Let’s see what kind of DAC quality we can get with a basic RC filter. So regardless of the duty cycle, we have a fairly large frequency band-in this case, from DC to 100 kHz-in which the low-pass filter can transition from no attenuation to significant attenuation. The spectrum certainly changes relative to 50% duty cycle, but one thing doesn’t change: the first spike is at the carrier frequency. What if the frequency components move around such that the low-pass filter becomes less effective? Consider the following two FFTs for 10% and 90% duty cycles: All the non-DC components of the signal would be eliminated, and we would be left with a DC voltage at 1.65 V.Īt this point, you might be wondering about how the spectrum changes as the pulse width is varied. If we had a perfect filter, we would have a perfectly stable DAC voltage-just look back at the previous plot and imagine a “brick-wall” filter that transitions from no attenuation to complete attenuation at 50 kHz. At this point you can probably see why we use a low-pass filter in a PWM DAC: the filter retains the DC component while suppressing everything else. So what we want is that stable 1.65 V over on the far left, and what we don’t want is that troublesome spike at 100 kHz (as well as all the higher-frequency spikes). I modified the next plot to include the DC component: However, the LTspice FFT doesn’t show us the DC component, which is nonzero because this square wave is not symmetrical about the x-axis. You might recognize this spectrum as the general pattern we expect from a square wave, i.e., a spike at the carrier frequency and then harmonics of decreasing amplitude at the carrier frequency times 3, the carrier frequency times 5, and so forth. Note also that A = 3.3 V and the rise and fall times are both 10 ns. Thus, the duty cycle is 50% and the PWM carrier frequency is 100 kHz. Here is the LTspice schematic:Īs you can see in the PULSE characteristics, the pulse width is 5 µs and the period is 10 µs. Let’s begin our more-thorough exploration of the PWM DAC by looking at the frequency-domain representation of a PWM signal. Where A (for “amplitude”) is the logic-high voltage. Thus, we can achieve digital-to-analog conversion by using firmware or hardware to vary the PWM duty cycle according to the following relationship: In the previous article we saw that a pulse-width-modulated signal can be “smoothed” into a fairly stable voltage ranging from ground to logic high (e.g., 3.3 V) the smoothing is accomplished by a simple low-pass filter. What Is a Low Pass Filter? A Tutorial on the Basics of Passive RC Filters.Introduction to Digital–Analog Conversion.
RC FILTER DESIGNER HOW TO
In this article we will take a closer look at how to effectively low-pass filter a PWM signal into an analog voltage.
0 kommentar(er)
